################################################################################
##
## Filename: 	rtl/Makefile
##
## Project:	VideoZip, a ZipCPU SoC supporting video functionality
##
## Purpose:	To direct the Verilator build of the SoC sources.  The result
##		is C++ code (built by Verilator), that is then built (herein)
##	into a library.
##
##
## Creator:	Dan Gisselquist, Ph.D.
##		Gisselquist Technology, LLC
##
################################################################################
##
## Copyright (C) 2015-2017, Gisselquist Technology, LLC
##
## This program is free software (firmware): you can redistribute it and/or
## modify it under the terms of  the GNU General Public License as published
## by the Free Software Foundation, either version 3 of the License, or (at
## your option) any later version.
##
## This program is distributed in the hope that it will be useful, but WITHOUT
## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
## for more details.
##
## You should have received a copy of the GNU General Public License along
## with this program.  (It's in the $(ROOT)/doc directory.  Run make with no
## target there if the PDF file isn't present.)  If not, see
## <http://www.gnu.org/licenses/> for a copy.
##
## License:	GPL, v3, as defined and found on www.gnu.org,
##		http://www.gnu.org/licenses/gpl.html
##
##
################################################################################
##
##
all:	test cpudefs.h design.h
YYMMDD=`date +%Y%m%d`
CXX   := g++
FBDIR := .
VDIRFB:= $(FBDIR)/obj_dir
VERILATOR := verilator

-include make.inc

VFLAGS     = -Wall -O3 -trace -cc $(AUTOVDIRS)

.PHONY: test
test: $(VDIRFB)/Vmain__ALL.a

CPUDR := cpu
CPUSOURCESnD := zipcpu.v cpuops.v pfcache.v pipemem.v div.v		\
			pfcache.v idecode.v wbpriarbiter.v		\
	zipsystem.v zipcounter.v zipjiffies.v ziptimer.v		\
		wbdmac.v icontrol.v wbwatchdog.v busdelay.v cpudefs.v
CPUSOURCES := $(addprefix $(CPUDR)/,$(CPUSOURCESnD))

JTAGBUS := wbuconsole.v wbufifo.v wbucompactlines.v				\
	wbucompress.v wbudecompress.v wbudeword.v wbuexec.v		\
	wbuidleint.v wbuinput.v wbuoutput.v wbureadcw.v wbusixchar.v	\
	wbutohex.v
NETSRCS := enetpacketst.v enetctrl.v					\
	addecrc.v addemac.v addepad.v addepreamble.v			\
	rxecrc.v rxehwmac.v rxeipchk.v rxemin.v rxepreambl.v rxewrite.v
HDMISRCS:= hdmisync.v hdmipixelsync.v hdmipxslip.v hdmihist.v		\
	hdmipixel.v transferstb.v tmdsdecode.v				\
	hdmigethmode.v hdmigetvmode.v hdmisync.v
SCOPESRCS := wbscopc.v wbscope.v
PERIPHERALS:= rtcdate.v rtcgps.v wbuart.v ufifo.v rxuart.v txuart.v	\
	wbqspiflash.v llqspi.v flashconfig.v				\
	wbicapetwo.v sdspi.v gpsclock_tb.v gpsclock.v wboledbw.v lloled.v \
	memdev.v spio.v wbi2cslave.v wbi2cmaster.v lli2cm.v
BIGMATH:= bigadd.v bigsmpy.v bigsub.v
SOURCES := main.v builddate.v $(SCOPESRCS)				\
	$(CPUSOURCES) $(JTAGBUS) $(PERIPHERALS) $(BIGMATH) $(HDMISRCS)

$(VDIRFB)/Vmain__ALL.a: $(VDIRFB)/Vmain.h $(VDIRFB)/Vmain.cpp
$(VDIRFB)/Vmain__ALL.a: $(VDIRFB)/Vmain.mk
$(VDIRFB)/Vmain.h $(VDIRFB)/Vmain.cpp $(VDIRFB)/Vmain.mk: $(SOURCES)

$(VDIRFB)/V%.cpp: $(VDIRFB)/V%.h
$(VDIRFB)/V%.mk:  $(VDIRFB)/V%.h
$(VDIRFB)/V%.h: $(FBDIR)/%.v
#	verilator -trace -cc $(AUTOVDIRS) $*.v

$(VDIRFB)/Vmain.cpp: $(VDIRFB)/Vmain.h
	@echo > /dev/null
$(VDIRFB)/Vmain.mk:  $(VDIRFB)/Vmain.h
	@echo > /dev/null
$(VDIRFB)/Vmain.h: main.v $(VFLIST)
	$(VERILATOR) $(VFLAGS) main.v

$(VDIRFB)/Vbusmaster.cpp $(VDIRFB)/Vbusmaster.h $(VDIRFB)/Vbusmaster.mk: \
	$(SLOWSRC) $(JTAGBUS) $(CPUSOURCES)

cpudefs.h: cpu/cpudefs.v
	@echo "Building cpudefs.h"
	@echo "// " > $@
	@echo "// Do not edit this file, it is automatically generated!" >> $@
	@echo "// To generate this file, \"make cpudefs.h\" in the rtl directory." >> $@
	@echo "// " >> $@
	@echo >> $@
	@sed -e '{ s/^`/#/ }' $< | sed -e ' s/cpudefs.v/cpudefs.h/' >> $@
	@echo >> $@

design.h: main.v
	@echo "Building design.h"
	@echo "// " > $@
	@echo "// Do not edit this file, it is automatically generated!" >> $@
	@echo "// To generate this file, \"make design.h\" in the rtl directory." >> $@
	@echo "// " >> $@
	@echo "#ifndef DESIGN_H" >> $@
	@echo "#define DESIGN_H" >> $@
	@echo >> $@
	@grep "^\`" $< | grep -v default_nettype | grep -v include | sed -e '{ s/^`/#/ }' | sed -e ' s/main.v/design.h/' | grep -v timescale >> $@
	@echo >> $@
	@echo "#endif // DESIGN_H" >> $@

$(VDIRFB)/V%__ALL.a: $(VDIRFB)/V%.mk
	cd $(VDIRFB); make -f V$*.mk

.PHONY:
archive:
	tar --transform s,^,$(YYMMDD)-rtl/, -chjf $(YYMMDD)-rtl.tjz Makefile *.v cpu/*.v

.PHONY: clean
clean:
	rm -rf $(VDIRFB)/*.mk
	rm -rf $(VDIRFB)/*.cpp
	rm -rf $(VDIRFB)/*.h
	rm -rf $(VDIRFB)/

DEFS=$(wildcard $(VDIRFB)/*.d)
ifneq ($(DEFS),)
include $(DEFS)
endif
